1. Field of the Invention
The present invention relates to a flat display panel driving method and a flat display device, and more particularly, to a method of driving a flat display panel such as an OCB-type liquid crystal display panel capable of providing a wide viewing angle and high-speed response, and a flat display device.
2. Description of the Related Art
Currently, a liquid crystal display panel utilizing characteristics such as lightness, thinness, and low power consumption is used as a display for use in television sets, personal computers and car navigation systems.
A twisted nematic (TN) type liquid crystal display panel widely utilized as this liquid crystal display panel is configured such that a liquid crystal material having optically positive refractive anisotropy is set to a twisted alignment of substantially 90° between glass substrates opposed to each other, and optical rotary power of incident light is adjusted by control-ling its twisted alignment. Although this TN-type liquid crystal display panel can be comparatively easily manufactured, its viewing angle is narrow, and its response speed is low. Thus, this panel has been unsuitable to display a moving image such as a television image, in particular.
On the other hand, an optically compensated birefringence (OCB) type liquid crystal display panel attracts attention as a liquid crystal display panel which improves a viewing angle and a response speed. The OCB-type liquid crystal display panel is sealed with a liquid crystal material capable of providing a bend alignment between the opposed glass substrates. The response speed is improved by one digit as compared with the TN-type liquid crystal display panel. Further, there is an advantage that the viewing angle is wide because optically self compensation is made from an alignment state of the liquid crystal material.
In the OCB-type liquid crystal display panel, as shown in (a) of FIG. 7, liquid crystal molecules 65 of a liquid crystal layer are set to a splay alignment when no voltage is applied between a pixel electrode 62 disposed on a glass based array substrate 61 and an counter electrode 64 disposed similarly on a glass based counter substrate 63 which is opposed to the array substrate 61. Thus, when a high voltage of the order of some tens of voltages is applied between the pixel electrode 62 and the counter electrode 64 upon supply of power, the liquid crystal molecules 65 are transferred to the bend alignment.
To reliably transfer the alignment state upon high voltage application, voltages opposite in polarity are applied to adjacent horizontal lines of the pixels to create a nucleus by a laterally twisted potential difference between the adjacent pixel electrode 62 and transfer pixel electrode. The alignment state is transferred around the nucleus. Such an operation is carried out for substantially one second, whereby the splay alignment is transferred to the bend alignment. Further, a potential difference between the pixel electrode 62 and the counter electrode 64 is equalized, thereby temporarily eliminating an undesired record.
After the liquid crystal molecules 65 have been thus transferred to the bend alignment, a voltage exceeding a low OFF voltage, at which the liquid crystal molecules 65 are maintained in the bend alignment as shown in (b) of FIG. 7, is applied from a drive power supply 66 during operation. Not only the OFF voltage but also a ON voltage which is higher than the OFF voltage is applicable from the drive power supply 66 as shown in (c) of FIG. 7. Thus, the drive voltage between the electrodes 62 and 64 changes in the range of the OFF voltage to the ON voltage. Consequently, the alignment state of the liquid crystal molecules 65 is transferred between the bend alignment shown in (b) of FIG. 7 and the bend alignment shown in (c) of FIG. 7 to change a retardation value of the liquid crystal layer, thereby controlling transmittance.
In the case where an OCB-type liquid crystal display panel is used for displaying an image, birefringence is controlled in association with polarizing plates. The liquid crystal panel is driven by a driver circuit such that light is shielded (for a black display) upon application of a high voltage and is transmitted (for a white display) upon application of a low voltage, for example.
The driver circuit includes a scanning line driver circuit 67 which is formed integrally on the array substrate 61 as shown in FIG. 8 and from which a plurality of scanning lines Y1 to Yn extend in a row direction, and a signal line driver circuit (not shown) from which a plurality of signal lines X1 to Xm extend in a column direction to intersect the scanning lines Y1 to Yn.
The signal lines X1 to Xm are divided into odd numbered signal lines X1, X3, . . . and even numbered signal lines X2, X4, . . . , and drain-source paths of thin film transistors (TFTs) 68-1, 68-2, . . . 68-m′ (m′=2m) configured as a pair of selector switches on an even number and odd number basis are connected to the respective signal lines X1 to Xm in parallel with each other. Among them, gates of TFTs 68-1, 68-3, . . . of an odd numbered set is connected to a terminal 69 to which a first selection signal is supplied, and gates of TFTs 68-2, 68-4, . . . of an even numbered set is connected to a terminal 70 to which a second selection signal is supplied, so that a video signal supplied to each of terminals 71, 72 is selected by the corresponding selection signal.
Switching thin film transistors (TFTs) 73 are disposed at intersections between the scanning lines Y and the signal lines X in which the drain-source paths of the TFTs 68-1 to 68-m′ are inserted. Each TFT 73 has a gate connected to one of the scanning lines Y1 to Yn, and a drain-source path connected at one end to one of the signal lines X. The other end of the drain-source path of the TFT 73 is connected to a liquid crystal capacitance element 74, and is connected to one end of a storage capacitance element 75. The other end of the storage capacitance element 75 is connected to a terminal 76 via a capacitance line Cs, and a storage capacitance voltage is applied from the terminal 76.
In addition, a vertical scanning clock signal and a vertical start signal are supplied to the scanning line driver circuit 67 via a terminal 77 and a terminal 78, respectively.
With such a configuration, a gate pulse from the scanning line driver circuit 67 is sequentially supplied to the scanning lines Y1 to Yn by line-at-a-time driving method, and TFTs 73 on one scanning line X are turned on simultaneously. In synchronism with this scanning, video signals from the signal line driver circuit are supplied via the terminals 71, 72 and the TFTs 68-1 to 68-m′ to the TFTs 73, to store a signal charge in each liquid crystal capacitance element 74 and the corresponding storage capacitance element 75 through the drain-source path of the corresponding TFT 73. The signal charge is held until a next scanning period has been established. Consequently, the liquid crystal capacitance elements 74 of all pixels connected to the scanning lines X are activated to display an image, the storage capacitance elements 75 are driven by a storage capacitance voltage which is applied by grounding the terminal 76 or by supplying a gate pulse in a reverse phase and supplied to the terminal 76.
In such a liquid crystal display panel, for example, in a first half of one horizontal scanning period (1H), a signal voltage having positive polarity (+) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected via the TFT 68-1 for the signal line X1, and a signal voltage having negative polarity (−) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected to the TFT 68-4 for the signal X2, respectively, as shown in (a) of FIG. 9.
In a latter half of 1H, a signal voltage having negative polarity (−) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected via the TFT 68-2 for the signal line X2, a signal voltage having positive polarity (+) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected via the TFT 68-3 for the signal line X1.
In addition, in a next frame, in a first half of 1H, a signal voltage having negative polarity (−) with is respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected to via the TFT 68-1 for the signal line X1, and a signal voltage having positive polarity (+) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected via the TFT 68-4 for the signal line X2, respectively, as shown in (b) of FIG. 9.
In a latter half of 1H, a signal voltage having positive polarity (+) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected via the TFT 68-2 for the signal X2, and a signal voltage having negative polarity (−) with respect to a voltage of the counter electrode 64 is written into the pixel electrode 62 connected via the TFT 68-3 for the signal line X1. In this manner, frame inversion driving and dot inversion driving are carried out, thereby preventing an application of an undesired direct current voltage and preventing an occurrence of flickering.
In such an OCB-type liquid crystal display panel, the alignment state can be transferred from the spray alignment to the bend alignment by means of a voltage applied between the pixel electrode 62 and the counter electrode 64. However, even if the bend alignment has been established, so-called inverse transfer from the bend alignment to the splay alignment easily occurs if the voltage held between the pixel electrode 62 and the counter electrode 64 is maintained at low voltage level. This raises a problem that a display image cannot be recognized.
As a countermeasure against the problem caused by the inverse transfer, it necessary that a high voltage is periodically applied (black-signal inserted) to a liquid crystal layer to prevent occurrence of the reversed transfer phenomenon. However, in the case where a black signal insertion process is performed to apply a high voltage, timing signals for inserting a black signal in an input signal are produced in a process on the television set side. Thus, there is a problem that an increased number of interfaces is required between the television set side and a liquid crystal panel module side.
Further, it is difficult to employ the countermeasure, because the processing capacity of a microcomputer is not enough to perform such a process on the television set side, and a design suitable to the television set side is required to be made on the liquid crystal panel side. Therefore, there is a problem that general use properties become poor.
In addition, in the case where the OCB-type liquid crystal display panel is used as a flat display device for use in a television set, this display panel is used under a condition in which the ambient temperature of the flat display device ranges from about 0 to 60° C. Further, in the case where the flat display device is used as a display for use in a car navigation system, the external environment of the television set used significantly changes. As a consequence, the ambient temperature of the flat display device is believed to significantly change from below 0° C. to about 80° C., and the use under a severer environment condition than that in room must be made. Therefore, it is necessary to set operating conditions of these flat display devices to a use condition adapted to the external environment.
FIG. 10 shows a result obtained by making an investigation about a temperature change which is one of the external environment changes.
FIG. 10 is a gamma characteristic view in which gradation is plotted on the horizontal axis and luminance is plotted on the vertical axis. In the figure, solid line “a” indicates a case in which the ambient temperature is 20° C.; dashed line “b” indicates a case in which the ambient temperature is 40° C.; single-dot chain line “c” indicates a case in which the ambient temperature is 60° C.; and double dot chain line “d” indicates a case in which the ambient temperature is 80° C. Here, when the ambient temperature is 80° C., a black inversion region is within the range indicated by the arrow “e” shown in the figure. This range serves as a region in which a problem occurs with a display quality.
In order to ensure that a problem does not occur with the display quality at this high temperature, it is necessary to set a black display voltage to be lower at the time of the high temperature. However, because it is difficult to change this setting once it has been set, the setting of the black display voltage at the time of the high temperature is kept unchanged even at the time of a room temperature of 20° C. Accordingly, the black luminance at the time of room temperature has increased from 1.1 to 2.6 cd/m2. Thus, the contrast is lowered from 450:1 to 170:1, and as a result, there occurs a problem that a sharp and clear image having its good contrast cannot be produced.
In addition, in the flat display device using the OCB-type liquid crystal display panel, black (black signal) insertion is carried out in order to prevent an inverse transfer phenomenon. However, an increased black insertion ratio is required to prevent the reversed transfer phenomenon at the time of the high temperature.
That is, FIG. 11 is a black insertion ratio characteristic view in each ambient temperature at which ambient temperature is taken on a horizontal axis and a black insertion ratio is taken on a vertical axis. This figure shows that it is necessary to increase the black insertion ratio with an increase of the ambient temperature. Because this black insertion ratio is shown as a value including a margin, such tendency does not change although slight change occurs.
As described above, the black insertion ratio is increased to prevent inverse transfer at the time of a high temperature. As is the case with the black display voltage described previously, however, the black insertion ratio at the time of this high temperature is maintained as is even at the time of room temperature. Thus, there has occurred a problem that, when operation is made at the time of room temperature, the luminance is lowered from 500 cd/m2 to 430 cd/m2, and the contrast is also lowered from 450:1 to 170:1.